The present invention is related generally to testing apparatus for integrated circuit chips (“IC chip” or “chip”), and more particularly to an assembly for regulating the temperature of an IC chip while the chip is mounted on a testing board so that it can be tested under predetermined temperature conditions.
Current IC chips can be designed to include hundreds of thousands of transistors, and those transistors require testing before the IC chip is delivered to a customer. Typically, each IC chip is incorporated into an integrated circuit module (IC module), and then the IC-chip in the IC-module is tested with a “burn-in” test, a “class” test, and a “system level” test. Electrical terminals are provided on the substrate which are connected by microscopic conductors in the substrate to the IC chip. The “burn-in” test thermally and electrically stresses the IC chips to accelerate “infant mortality” failures. The stressing causes immediate failures that otherwise would occur during the first ten percent of the chips' life in the field, thereby insuring a more reliable product for the customer. The burn-in test can take many hours to perform, and the temperature of the IC chip typically is held in the 90 degree C. to 140 degree C. range. Because the IC chips are also subjected to higher than normal voltages, the power dissipation in the IC chip can be significantly higher than in normal operation. This extra power dissipation makes the task of controlling the temperature of the IC chip very difficult. Further, in order to minimize the time required for burn-in, it is also desirable to keep the temperature of the IC chip as high as possible without damaging the IC chip.
The “class” test usually follows the burn-in test. Here, the IC chips are speed sorted and the basic function of each IC chip is verified. During this test, power dissipation in the IC chip can vary as the IC chip is sent a stream of test signals. Because the operation of an IC chip slows down as the temperature of the IC chip increases, very tight temperature control of the IC chip is required throughout the class test. This insures that the speed at which the IC chip operates is measured precisely at a specified temperature. If the IC-chip temperature is too high, the operation of the IC chip will get a slower speed rating, resulting in the IC-chip being sold as a lower priced part.
The “system level” test is the final test. In the system level test, the IC chips are exercised using software applications that are typical for a product that incorporates the IC chips. In the system level test, the IC chips are tested over a temperature range that can occur under normal operating conditions, i.e. approximately 20 degree −80 degree C.
During each of these tests, it is important to control and be able to test the chips under a variety of temperature ranges. Currently, to control the temperature of the chips during testing, large and expensive machines have been constructed such as those available from Delta Designs of Poway California, for example the ETC handlers (see www.deltad.com). These machines can cost up to four hundred thousand dollars or more. The temperature control of such machines requires larger volumes to be heated or cooled, and require large allocations of space and capital to operate. The present chip testing technology is in need of a low cost, efficient method of controlling the temperature of an IC chip under test.